optimum switch sizing for class de amplifier
abstract
recently, integrated class de ampli fiers without matching networks have been proposed as
a compact solution to drive a multi-element piezoelectric ultrasound transducer array for high-intensity
focused ultrasound (hifu) therapy. these transducers produce acoustic energy that
translates into heat for tissue ablation. in order to steer the focal zone, each element in the
transducer array is driven at a different phase. hence, there's a need for the power amplifi er
with a digital control unit in this application.
since each element in the transducer array has a different electrical characteristic and they
have to be driven at the same frequency, it is a challenge to drive all transducers in the array
at their optimum conditions. this work introduces strategies to determine efficient driving
parameters for an entire transducer array. in addition. a method to improve the power efficiency
of the class de amplifi er by choosing the optimum size for switching mosfets is also proposed.
during the operation of a class de ampli fier, losses are caused by the on resistance and the
drivers of the mosfet gate capacitances. these parameters are directly dependent on the size
of the switching mosfets. a wider mosfet will have a higher gate capacitance, but lower
on resistance. with the correct sizing, these losses can be greatly reduced to improve power
efficiency and prevent excessive heating. the challenge with this method is the wide selection
of transducers with varying impedance. as the load impedance changes, the mosfet size
also needs to be changed to maintain the maximum power efficiency. also, the proposed design
must deliver at least 1 w output power to the transducer in order to produce enough acoustic
pressure. this output requirement will limit the available technology that can be used to design
the amplifi er. in addition, this work also proposes a new driving circuit that consumes less power
to operate, and also allows a full 0-360 degree phase shift.
the design is simulated with spectre simulator using 0.35 m 50v cmos process data
available from austria micro systems. the proposed design can deliver 1422mw of average
power to 6-elements transducer array, and achieve up to 91% power efficiency.