modeling and analysis of limit cycles in buck converters under pi control
abstract
a zero order hold equivalent discrete-time model of the buck converter for computing its
large signal frequency-response is developed and experimentally verified. it is shown that
with a dc bias and a sinusoidal variation of the input duty cycle, the frequency-response
of the output voltage from the converter shifts from underdamped behaviour to damped
behaviour with increasing amplitude of the input sinusoid. it is observed th at with a
given dc input bias and a given input amplitude beyond the range of the state-space
averaged small signal model, the converter behaviour varies from exclusively continuous
inductor current mode at low frequencies to behaviour with continuous and discontinuous
inductor current modes at high frequencies. the use of this sinusoidal input large signal
frequency-response in predicting limit cycles induced by feedback of output voltage using
proportional and integral controllers for such converters is studied. experimental results
confirming the use of this large signal frequency-response are presented. also the use of
large signal model in predicting the steady-state behaviour is studied.
collections
- retrospective theses [1604]